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Samsung Unveils First 400-Layer V10 BV-NAND and zHBM Concept at FMS 2026

Samsung Electronics has unveiled the industry’s first V10 BV-NAND flash memory with more than 400 layers, along with concept models of two new 3D memory architectures called zHBM and zNAND-O. The company presented the portfolio at the Future of Memory and Storage (FMS) 2026 conference in Santa Clara, California, where its memory executives delivered the opening keynote on 3D innovations in memory and storage architecture. Samsung says the new V10 BV-NAND increases memory density by roughly 58 percent over the previous V9 generation.

The announcements matter because memory, not just processors, has become the real bottleneck in AI computing. Samsung published the full details on its global newsroom.

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What V10 BV-NAND Actually Changes

BV stands for Bonding V-NAND. Instead of building the memory cells and the control circuitry in one continuous stack, Samsung manufactures them separately and then bonds the wafers together. That is what allows the layer count to pass 400 without the manufacturing yield falling apart.

The timing carries some symbolism for the industry. Samsung introduced the first V-NAND technology at the 2013 Flash Memory Summit, so this is the same company returning to the same conference thirteen years later with the architecture that follows it. Beyond the layer count, Samsung says V10 BV-NAND improves read, write and input/output performance over the previous generation.

zHBM Puts Memory Directly on Top of the Processor

The more forward looking part of the announcement is zHBM, which Samsung showed as a concept model rather than a shipping product. Conventional high bandwidth memory sits beside the AI accelerator on the same package. zHBM stacks the memory vertically, directly above the accelerator.

The reason is physics. Every millimetre a signal travels costs time and energy. By shortening that distance, Samsung says a next generation interface system incorporating zHBM is expected to deliver roughly eight times the performance of HBM5, with more than ten times the memory density, about three times better energy efficiency, and more than half the thermal resistance removed. Those are company projections for a concept model, not benchmarked results from shipping silicon, and they should be read that way.

Samsung also introduced zNAND-O, a high performance NAND solution in development in four and eight layer versions, aimed at edge AI environments where real time, data intensive processing happens close to the device rather than in a data centre.

Where This Sits in the Wider Memory Race

Samsung used FMS to lay out the rest of its roadmap as well, including HBM4E samples, an HBM5 model, LPDDR5X-PIM (the first LPDDR memory with processing-in-memory technology, which performs computation inside the memory itself), and enterprise storage products aimed at AI data centres. The company began mass producing HBM4 in February 2026 and started shipping HBM4E samples in May.

Samsung also leaned on a structural argument: it is the only integrated device manufacturer with memory, foundry and advanced packaging capabilities under one roof, which it pitches as a one-stop turnkey option for customers building custom AI silicon.

Why It Matters for the Rest of Us

Two practical implications come out of this.

First, memory pricing is going to stay uncomfortable. Rising memory chip costs have already been flagged publicly by other manufacturers this year, and demand for HBM and high layer NAND is what is driving it. If you buy laptops, phones or server capacity, that pressure eventually reaches your invoice.

Second, the shape of AI hardware is still changing. A lot of coverage treats GPUs as the whole story. In practice, whether an AI system is fast or slow, cheap or expensive to run, increasingly comes down to how quickly data can move between memory and the processor. Architectures like zHBM and processing-in-memory are attempts to attack that problem at the physical level rather than through better software.

For developers and business owners, the takeaway is not to memorise chip names. It is to understand that the cost of running AI workloads is still falling for structural reasons, and that the companies solving the data movement problem are quietly as important to that curve as the model labs getting the headlines.

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Written by Madiha Yaqoob

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